Drive circuit for ferrite phase shifters

ABSTRACT

A beam-steering apparatus in combination with a phased array antenna. The apparatus comprises a source of reference pulses of frequency (1/T0). Also included are means responsive to beamsteering angle magnitude signals phi for generating proportional pulse width modulated pulses such that each pulse width T phi T0/2 pi . Additional means responsive to the modulated pulses alter the phase of the corresponding phase shift device in the phased array element with output pulses of width T when (T/T0) 1, and T- T0 when (T/T0)&gt;1.

United States Patent Inventors Appl No,

Filed Patented Assignee DRIVE CIRCUIT FOR FERRI'I' E PHASE SHII'TERS 9Claims, ll Figs.

US. Cl 317/123, 343/100 SA, 343/854, 317/148.5 R

Int. Cl l-ltllh 47/22 Fieldotseardi 3l7/l23;

[56] References Cited UNlTED STATES PATENTS 2,992,409 7/l96l Lawrence...317/135 3,154,784 l0/l964 Allen 343/778 X 3,293,495 12/1966 Smith3l7/l23 X 3,345,63l 10/1967 Chamberlin 343/854 X Primary Examiner-J. D.Miller Assistant Examiner-Harry E. Moose, .lr, AttorneysPhilip J.McFarland and Joseph D, Pannone ABSTRACT: A beam-steering apparatus incombination with a phased array antenna. The apparatus comprises asource of reference pulses of frequency (l/T Also included are meansresponsive to beam-steering angle magnitude signals (b for generatingproportional pulse width modulated pulses such that each pulse widthT=TJ2112 Additional means responsive to the modulated pulses alter thephase of the corresponding phase shift device in the phased arrayelement with output pulses ofwidth T when I 1, and T-T when 21 1 To To 4F 23 I l c1 RESET I 28 l I 2/ I a I W I I 24 I w L. I I I l +E I LPATENIEB JUL 27 19/1 SHEET 1 OF 3 3 w a a A A A w a u D D D P w w 3 E CC 2 2 R 2 2 3 W N A A S L 2 m 2 a M D D D G 1 P w w w c E m H m 3 N A AA A m H l M D M 0 w 0 w w m c C n mu fl b a 1 2 ER 3 A W N 2) M0 c auomnom Zw w m4mz 30m m C j M 4 I BEAM STEERING A PPARATUS FIG. 1

INVENTORS EDWARD J, SHELDON ROSARIO MANGIABM/E EDWIN SEGA/PR4PATENTEUJULZHQTI 3,596,145

sum 3 OF 3 l c; EsET FF Z8 4 I 2/ I I W b I 17. 24 I I 20 1' PHASE SHIFTl I oRIvER 013 I I I +E FIG. 30 L J 4i EE- E E0 o-flq I SHORT cIRcuIT TI24 1 3 I l N0I2E I i I 1 I 20 ILI I 3 I I I I I I I PHASE SHIFT DRIVER HT I R I WITH EXTERNAL CONTROL CIRCUIT 2 1 I I NETWORK SI EI NODE L .---JF1630 I g I AND 8 Rs EQUIVALENT s 737 5 22" cIRcuIT or THE con.

F /6. 4b I E E F/G. 4c con. DISCHARGE WITH SHORTED TuRN INVENTORS EDWARD.1. $051.00 t ROSARIO MANG/APANE EDWIN SEGARRA DRIVE CIRCUIT FOR FERRITEPHASE SIIIII'ERS This application is a division of copendingapplication, Ser No 126,352, now U S Pat No $484,785 filed May 3, i968.

BACKGROUND OF THE INVENTION This invention relates to a beam-steeringapparatus in com bination with a phased array antenna, and moreparticularly, to current drivers in combination with fen'ite phaseshifters in such phased array antennas.

In electronically steered phased array antennas, a plurality ofindividual antenna radiating elements are arranged in linear or matrixarray to provide beam steering by electronic techniques. Beam steeringis accomplished by altering the phase relation of signals on differentradiating elements. This is instrumented by changing the correspondingphase of the phase shift device in the phased array element. The phaseshift devices have used a ferrite rod located within a waveguidesection, in turn, surrounded by a coil. Such a system is, for example,shown in an article entitled, "Polarization insensitivity Phase Shifterfor Use in Phased Array Antennas, by Mohr and Monaghan, published in theI967 G-MT'I' Symposium Digest, May 28, 1967, pages 91-94. Significantly,such devices are current responsive and require current drivers.

In matrix array, the phase shifters may alter phase by the summing ofrow and column beam-steering angle magnitude signals. These signalsindependently vary from to 360 such that their sum will cover a regionof approximately 720". It is desirable to avoid driving the phaseshifter greater than 360 in view of the fact that the required maximumcorresponding phase shifter physical length is increased for linearoperation. A signal propagated through additional distance is subject toadditional loss. There is thus a need for a decision-rnaking device atthe phase shifter for determining when a selected sum exceeds 360 andderiving a signal indicative of only the excess phase over 360. Anglesmay be described and measured in terms of degrees i.c. 0 to 360 or bycorresponding radian measure i.e. 0 to 2x radians.

In the prior art, coil arrangements surrounding the ferrite phaseshifter were used to buck the flux to accomplish the modulo 21rsubtraction. Finally, digital adders have also been used in such matrixarrays. This is set forth in FIG. 7 of U.S. Pat. No. 3,274,60l issued onSept. 20, 1966 to .l. Blass.

It is accordingly an object of this invention to devise a beam-steeringapparatus which can effect a modulo 2w phase shift using simplifiedanalog circuit structure.

It is another object of this invention to devise a beam-steeringapparatus used with phased array antennas. These typically include amatrix having cross-point phase shift elements that sum correspondingrow and column beam-steering angle magnitude signals, modulo 2n the sumto obtain an angle in the range between 0 and 360 and provide an outputsignal for phase shift purposes proportional to the sum modulo 21:.

It is yet a related object of the invention to devise a modulo 21r angleindicating apparatus in analog circuit configuration.

SUMMARY OF THE INVENTION The objects of this invention are satisfied ina preferred embodiment in which a beam-steering apparatus is used incombination with a phased array matrix antenna. The apparatus comprisesa source of reference signals of frequency (l/T,,). Also included aremeans responsive to first beam-steering angle magnitude signals 0. forapplying corresponding first signals to the matrix rows. Each firstsignal is proportionally spaced in time by an interval t;=(I -T,l2rr)prior to a given reference signal. Likewise, means responsive to secondbeamsteering angle magnitude signals 4% apply corresponding secondsignals to the matrix columns. Each second signal is proportionallyspaced in time by an interval t I ,,T,/21r) after the given referencesignal. Lastly, means at each matrix cross-point responsiveto thereference signals, first signals and second signals defining a timeinterval 1 alter the phase shifi of the corresponding matrix antennaelement. This IS controlled by having the output signals proportional to45+ Ikwhen l5%tc $1 and proportional to l +d -2rrn when There is ineffect a pulse width modulation of each reference pulse proportional tothe sum of the angles. The modulo 21r of the sum is achieved bycomparing the modulated pulse width to the period of the referencepulse. If the ratio is greater than I; then an output pulse of width T-Tis used to alter the corresponding antenna element phase shift.Significantly, the object of devising a modulo 21r angle indicatingapparatus is likewise satisfied and furthermore is operable even thoughthe frequency of the reference signal is changed. This last aspectarises from relating the pulse width T to T by the factor 1 21).

A specific preferred circuit embodiment of the invention shows a driverin combination with a ferrite phase shifter. Since the ferrite phaseshifter is a current responsive device, then the driver comprises acurrent source and means responsive to a pulse train or interconnectingthe source to the phase shifter only for the duration of each pulse.This is instrumented by forming the current source from a voltage sourcein series with coil. A first current path, including the coil and thevoltage source, is established only during the pulse duration and asecond current path, including the coil, is established during theinterpulse interval to maintain the current magnitude in the coil eitherconstant or changeable under control.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. I is a block diagram of thebeamsteering apparatus used in combination with a phased matrix arrayantenna;

FIGS. Za-e show timing diagrams of the pulse width modulation of thereference pulses particularly emphasizing the aspect of the modulatedpulse width exceeding the period of the reference pulses;

FIG. 3A shows a block diagram of the phase shift driver constituting aportion of the cross-point elements D,,D,, in the matrix shown in FIG.1;

FIG. 3B shows the phase shift driver exhibiting the means formaintaining control of the current source,

FIG. 4A is a simplified circuit diagram of the phase shifter coil with ashorted turn;

FIG. 4B is an equivalent circuit of the circuit shown in FIG. 4A; and

FIG. 4C exhibits the current versus time coil discharge with shortedturn characteristic.

DESCRIPTION OF THE PREFERRED EMBODIMENT FIG. I exhibits a beam-steeringapparatus in block diagram form in combination with a phased matrixarray antenna. A plurality of radiating elements and corresponding phaseshifters coupled to them are shown as elements A -Aa in matrix array. Aplurality of phase shift drivers D,,D,, intereouple the antenna elementsto a corresponding electrical conductor matrix formed by row conductorsr., r,, and r, and column conductors c,, c,, and 0,. The drivers may beconsidered as the appropriate cross-point elements for the matrix. Eachof the matrix row conductors connects a row phase shift angle signalsource to a corresponding terminal input on a given driver row. Thus,row conductor r, couples drivers D D and D Thus, row conductor r,couples drivers D D,,, and D A column phase shift angle signal source 3couples a second input to corresponding column terminals of the driversover column conductors c,, c,, and c,. Illustratively, column conductorc, connects drivers D D and D A mode and time control unit 2 is coupledby conductor u. This unit permits the phase shift driver to operate inseveral modes such as charging, steady state, and dumping.

Also shown is clock 4 which operates as the course of reference signalshaving a frequency of (HR). This clock is coupled to the row anglesignal source I and the column angle signal source 3 over paths 5 and 6respectively.

Attention is now directed to FIGS 24- -e to be considered along with theembodiment illustrated in FIG I The timing references shown in FIG 20having a frequency of t lIT,,) are simultaneously applied by the clockto the angle signal sources I and 3 The angle signal sources eachgenerate simultaneously or otherwise pulse signals on corresponding rowor column conductors. Thus, for the row angle signal source I pulsesignals are applied to row conductors r,, r,, and r, The signals areapplied at a point in time prior to the occur rence of a given referencepulsev This time interval i is proportional to the phase shift anglemagnitude signal I In this invention, the interval i is set equal to(fib l /211'). ln normal operation, 0,, and D will vary between and 21:.However, the magnitude of 0., or for that matter Q may in steady statehave any value. Thus, if 4),, was equal to Sir radians, then I would beequal to (3T,,l2)v It is emphasized again that the interval I, mayrepresent different values as applied to each row conductor.

Column phase shift angle signal source 3 impresses corresponding signalsshown in FIG. 2c spaced in time after the reference pulse uponcorresponding column conductors c,, c,, and c,. The time interval I isproportional to a corresponding phase shift angle signal magnitude of bThe interval is set equal to (QR-T 121). This interval may be ofdifferent magnitude upon each conductor. Each of the time intervalsdeter mined by the row and column signals is combined at a corresponding cross-point device. Thus, an interval I impressed on rowconductor r: and an interval 1 impressed on column conductor c, would besummed as is shown in FIG. 2d at crosspoint driver D in FIG. I.

In FIG. 2e the sum of the intervals as represented by the row and columnphase shift angle signals which exceed 21'r is set forth. Thisillustrates the modulo 2n effect. It should be noted that the resultingsignal is the sum t,+t T,,.

FIG. 3a shows a general embodiment of the phase shift driver accordingto the invention. In FIG. I, the antenna and shift element isrepresented symbolically by A,,. The coil L, in FIG. 3a represents aportion of the input to the phase shifter. Coil L, is driven bytransistor T, and is coupled to the collector electrode. The transistoremitter electrode is terminated at ground 28 through conductor 23.Flip-flop 2l drives the transistor base over conductor 22. The flip-flopSET input is coupled to the ith row conductor. The RESET flip-flop inputis coupled to thejth column conductor.

operationally, the row signal sets flip-flop 21 which drives transistorT, intosaturation. This electrically couples the coil L, to thetransistor. The signal upon the corresponding column activates the RESETinput which turns the transistor off. AFter the transistor is turnedoff, the current path including diode 20 can be used to discharge thecoil current or recirculate it through the coil and an appropriatevoltage source.

In FIG. 3b a modified version of the circuit shown in FIG. 3a is setforth. There are three modes of operation contemplated. The first is acharge mode to establish a commanded current. Second, there is a steadystate mode to keep the current con stant. A third or dump mode is usedto reset the coil current to zero. It should be noted that a capacitorC, is placed across inductance L,. The inherent coil resistance issymbolically shown as a series resistance R,.

During the first or charge mode, a voltage E, is applied at nodes 1 and2. This voltage determines the time required to achieve the finalcurrent. In the steady state mode, nodes 1 and 2 are connected tovoltage source E The value of E, is such that (EJR is the currentrequired to produce maximum phase shift. Driving the transistorperiodically into saturation with a duty cycle d" will produce anaverage current in inductance L, of (E,dIR,). During the dump mode, nodeI is at E, and node 2 is coupled to E, E, is a potential about percenthigher than E,. When the transistor is open-circuited, the inductive emfrises to E,E,. The coil current begins to fall at the rate of E,-E,]L,).It will continue at this rate until the coil is discharged providing thecoil is not coupled to a "shorted" turn.

The effect of a shorted tum on the discharge of inductance L of n turnsis shown in FIGS. 44 through 4c. It will be seen that the diode 20disconnects the inductance L from the voltage sources whenever thecurrent is below the level (E EJR, where R, is the transformed shortedturn resistance. Below this current value the current decay isdetermined by (L,/R,).

In summary a beam-switching apparatus In combination with a phased arrayantenna has been shown in which phase shift angle magnitude signals havebeen used to pulse width modulate reference signals having apredetermined frequency. A modulo 2n angle indication necessary forefficient beamswitching operation has been instrumented in an embodimentusing a ferrite phase shifter driver by a current source connectable tothe phase shifter in response to and for the duration of the width of anapplied pulse. This is of particular use in a matrix antenna array inwhich the amount of phase shift is determined by summing informationfrom row and column conductors and driving the phase shifter between 0to 360. This also occurs when the sum exceeds 360' by subtracting modulo21r from the sum.

We claim:

I. A circuit for having the control coil of a ferrite phase shifter, thecontrol coil being formed of N turns where N is the number of turns inthe coil winding, the control coil having inductance L,, coil resistanceR,, and interwinding capacitance C,, the circuit comprising:

a. a flip-flop circuit having an output port, a SET input port a RESETinput port, and responsive to SET and RESET trigger pulses such that afirst voltage level is produced at the output port in response to theSET signal and a second voltage level is produced at the output port inresponse to the RESET signal;

. a first and second source of electric power, each source of electricpower being connecting to a common ground, the first source of electricpower being adapted to provide selectively a voltage of value V and avoltage of value V,,, V, being less then V,, the second phase ofelectric power being adapted to provide, selectively, a voltage of valueV,, a voltage of valve V, and a voltage of value V V, being less than V,and V, being greater than V, such that V,+V;,,=V

c. a diode connecting between one terminal of the control coil and thesecond source of electric power, a second terminal of the control coilconnecting with the first source of electric power;

. a transistor coupling from the junction of the diode and a controlcoil to the common ground whereby a state of conduction within the diodeis terminated whenever the transistor is driven into a state ofconduction; the transistor connecting with the flip-flop output wherebythe flip-fl0p drives the transistor into a state of conduction when thefirst voltage level is present at the flip-flop output, and drives thetransistor into a state of nonconduction when the second voltage levelis present at the flip-flop output;

e. a row conductor and a column conductor connecting respectively to theSET input port and the RESET input port for transmitting to theflip-flop respectively a SET trigger pulse and a RESET trigger pulse,the SET and the RESET trigger pulses occurring periodically, the dutycycle of the transistor being equal to the ratio of the duration of theinterval of conduction to the period of the SET trigger pulses.

2. The circuit of claim I in which the control coil is wound around acylindrical waveguide section, the cylindrical waveguide sectionappearing as a shorted turn having a resistance R, and inductivelycoupling with the control coil to present an apparent resistance ofvalue N'R in parallel with such coil, N'R, being substantially largerthan R, so that the time constant of the control coil is substantiallyL,/R,.

3. The circuit of claim 2 in which the first source of electric power issupplying a voltage of value V, and the second source of electric poweris supplying a voltage of value V, so that current flows through thecontrol coil via a path including, alternately, the transistor and thediode, the current through such coil thereby building up to asubstantially steady state value having a magnitude proportional to theduty cycle of the transistor. 1 i i 4. The circuit of claim 2 in whichthe first source of electric power is supplying a voltage of value V;and the second source of electric power is also supplying a voltage ofvalue V so that current flows through the control coil via a pathincluding, alternately, the transistor and the diode, the currentthereby increasing at an average rate proportional to the duty cycle ofthe transistor.

5. The circuit of claim 2 in which the first source of electric power issupplying a voltage of value V, and the second source of electric poweris supplying a voltage of value V, so that cur rent flows through thecontrol coil via a path including, alternately, the transistor and thediode, the current through such coil thereby flowing against a voltageof value V,-V =V, and thereby decreasing at a rate related to the dutycycle of the transistor.

6. A circuit for driving current through the control coil of a phaseshifter, such circuit being responsive to a periodic train of pairedpulses in which the time spacing between the pulses in each pair ofpulses designates the magnitude of electric current to be applied to thecontrol coil, the time constant of the control coil being ofsubstantially longer duration than the period of the paired pulses, thecircuit comprising:

a. flip-llop means responsive to the periodic train of paired pulsessuch that one pulse in each pair of pulses sets the flip-flop therebyinitiating at the flip-flop output a switch control signal, the secondpulse in each pair of pulses resetting the flip-flop thereby terminatingat the flip-flop output of the switch control signal;

l:v a first source of electric power, a second source of electric power,and a diode, the diode connecting between the second source of electricpower and one terminal of the control coil, a second terminal of thecontrol coil connecting with the first source of electric power;

c. grounding means connecting the first and the second sources ofelectric power;

d. switching means responsive to the switch control signal, theswitching means connecting from the junction of the diode and thecontrol coil to the grounding means whereby the switching means providesa conducting path from the diode to the grounding means during theduration of the switch control signal so that the diode is thennonconducting, and breaks such path during the time interval between theswitch control signals so that the diode is then conducting.

7. A circuit for driving current through the control coil ola phaseshifter, the circuit responsive to a train of paired pulses forproviding a magnitude to the current in accordance with the ratio of thetime spacing between pulses in each pair of pulses to the time spacingbetween successive pairs of pulses in the train of pairetli'iulses, thecircuit comprising:

a. first source of electric power, a second source of electric power,and grounding means, the grounding means connecting a common terminal ofthe first and the second sources of electric power;

b. switching means, the control coil connecting between the first sourceof electric power and one terminal of the switching means, a secondterminal of the switching means connecting with the second source ofelectric power, and a third terminal of the switching means connectingwith the grounding means whereby the second and the third terminalsare,alternately, connected via a conducting path through the switch to thecontrol coil;

c. flip-flop means connecting with and driving the switching means, theflip flop means being responsive to the train of paired pulses such thatin response to a first pulse in each pair of pulses a conducting path isprovided between the control coil and the grounding means, and inresponse to the second pulse in each pair of pulses a conducting path isprovided between the control coil and the second source ofelectricpower.

8. A driver in combination with a ferrite phase shifter comprising:

a first voltage source;

an inductance forming an input portion of the ferrite phase shifter;

means responsive to an applied pulse train for forming a firstconducting path including the inductance and the first voltage sourcefor the duration of each pulse;

a second voltage source; and

means for forming a second current path including the inductance and thesecond voltage source during the interpulse interval whereby a currentintegrating characteristic becomes synthesized.

9. A current driver in combination with a ferrite phase shiftercomprising:

a first voltage source;

a coil forming an input portion of the ferrite phase shifter;

means, including a transistor coupling the coil, and responsive to anapplied pulse train for forming a first conduct ing path including thecoil and the first voltage source for the duration of each pulse, saidtransistor being driven into saturation;

a second voltage source; and

means including the transistor for forming a second current pathincluding the coil and the second voltage source during the interpulseinterval, the transistor being in an open circuit condition as allowedby the second current path, whereby the level of integrated current inthe coil is proportional to the duty cycle modulation of the appendedpulse train.

Patent No.

Inventor(s)EdWaId J. Sheldon, Rosario Mangiapang, Edwin Segarra It iscertified that error appears in the above-identified patent and thatsaid Letters Patent are hereby corrected as shown below:

Column 1 line 67 change -"t T /l 1! to t Column 1, line 71 change "t I T/2 1r to t Column 2, line 3, change "t I P 2 ni 2 1r to integer and (PC@R 2 1T 2 Column 2,

Column 2,

Column 2,

Column Column Column Column 4,

Column 4, "a RESET" Column 4, "second CERTIFICATE OF CORRECTION Page 1UNITED STATES PATENT OFFICE Dated y 27, 1971 line line

line

line

line

line

line

line

line

R t 1,n being any integer and t t /T 1,n being any 14, change ((D 2 Tr)"to I /2 n 64, change "Thus," to Likewise,

72, change "course" to source 4, change "(l/T to l/T change I I /2 1r)to I T /2 1r 49, change "AFter" to After 20, Claim 1, change "having" todriving 26, Claim 1, section a., insert and before 31, Claim 1, sectionb. insert a before M PO-IOSO (ID-69) USCOMM-DC 80316-169 uls GOVERNMENTPRINYING OFFICE: III! o-su-su UNITED STATES PATENT OFFICE Page 2CERTIFICATE OF CORRECTION Patent No.

Dated July 27, 1971 It is certified that error appears in theabove-identified patent and that said Letters Patent are herebycorrected as shown below:

Column 4, line 32, Claim 1,

section b. change "connecting" to connected Column 4, line 35, Claim 1,section b., change "phase" to source Column 4, line 37, Claim 1, sectionb., change "valve" to value Column 4, line 39 Claim 1, section b.,change "V V V to V V V Column 4, line 47, Claim 1, section d., change toColumn 5, line 20, Claim 6, omit "the" (second occurrence) Column 5,line 30, Claim 6, section a. omit "of" Column 6, line 2, Claim7,'section a., insert a before "first" Column 6, line 5G, Claim 9,change "appended" to applied Signed and sealed this 13th day of June1972.

(SEAL) Attest:

EDWARD M.FLE'ICHER,JR. Attesting Officer I FO-IOSO (10-69] ROBERTGO'I'TSGHALK Commissionerof Patents

1. A circuit for having the control coil of a ferrite phase shifter, thecontrol coil being formed of N turns where N is the number of turns inthe coil winding, the control coil having inductance L1, coil resistanceR1, and interwinding capacitance C1, the circuit comprising: a. aflip-flop circuit having an output port, a SET input port a RESET inputport, and responsive to SET and RESET trigger pulses such that a firstvoltage level is produced at the output port in response to the SETsignal and a second voltage level is produced at the output port inresponse to the RESET signal; b. a first and second source of electricpower, each source of electric power being connecting to a commonground, the first source of electric power being adapted to provideselectively a voltage of value V2 and a voltage of value V3, V2 beingless then V3, the second phase of electric power being adapted toprovide, selectively, a voltage of value V1, a voltage of valve V3 and avoltage of value V4, V1 being less than V2 and V4 being greater than V3such that V2+V3 V4; c. a diode connecting between one terminal of thecontrol coil and the second source of electric power, a second terminalof the control coil connecting with the first source of electric power;d. a transistor coupling from the junction of the diode and a controlcoil to the common ground whereby a state of conduction within the diodeis terminated whenever the transistor is driven into a state ofconduction; the transistor connecting with the flip-flop output wherebythe flip-flop drives the transistor into a state of conduction when thefirst voltage level is present at the flip-flop output, and drives thetransistor into a state of nonconduction when the second voltage levelis present at the flip-flop output; e. a row conductor and a columnconductor connecting respectively to the SET input port and the RESETinput port for transmitting to the flip-flop respectively a SET triggerpulse and a RESET trigger pulse, the SET and the RESET trigger pulsesoccurring periodically, the duty cycle of the transistor being equal tothe ratio of the duration of the interval of conduction to the period ofthe SET trigger pulses.
 2. The circuit of claim 1 in which the controlcoil is wound around a cylindrical waveguide section, the cylindricalwaveguide section appearing as a shorted turn having a resistance Rs andinductively coupling with the control coil to present an apparentresistance of value N2Rs in parallel with such coil, N2Rs beingsubstantially larger than R1 so that the time constant of the controlcoil is substantially L1/R1.
 3. The circuit of claim 2 in which thefirst source of electric power is supplying a voltage of value V2 andthe second source of electric power is supplying a voltage of value V1so that current flows through the control coil via a path including,alternately, the transistor and the diode, the current through such coilthereby building up to a substantially steady state value having amagnitude proportional to the duty cycle of the transistor.
 4. Thecircuit of claim 2 in which the first source of electric power issupplying a voltage of value V3 and the second source of electric poweris also supplying a voltage of value V3 so that current flows throughthe control coil via a path including, alternately, the transistor andthe diode, the current thereby increasing at an average rateproportional to the duty cycle of the transistor.
 5. The circuit ofclaim 2 in which the first source of electric power is supplying avoltage of value V2 and the second source of electric power is supplyinga voltage of value V4 so that current flows through the control coil viaa path including, alternately, the transistor and the diode, the currentthrough such coil thereby flowing against a voltage of value V4-V2 V3and thereby decreasing at a rate related to the duty cycle of thetransistor.
 6. A circuit for driving current through the control coil ofa phase shifter, such circuit being responsive to a periodic train ofpaired pulses in which the time spacing between the pulses in each pairof pulses designates the magnitude of electric current to be applied tothe control coil, the time constant of the control coil being ofsubstantially longer duration than the period of the paired pulses, thecircuit comprising: a. flip-flop means responsive to the periodic trainof paired pulses such that one pulse in each pair of pulses sets theflip-flop thereby initiating at the flip-flop output a switch controlsignal, the second pulse in each pair of pulses resetting the flip-flopthereby terminating at the flip-flop output of the switch controlsignal; b. a first source of electric power, a second source of electricpower, and a diode, the diode connecting between the second source ofelectric power and one terminal of the control coil, a second terminalof the control coil connecting with the first source of electric power;c. grounding means connecting the first and the second sources ofelectric power; d. switching means responsive to the switch controlsignal, the switching means connecting from the junction of the diodeand the control coil to the grounding means whereby the switching meansprovides a conducting path from the diode to the grounding means duringthe duration of the switch control signal so that the diode is thennonconducting, and breaks such path during the time interval between theswitch control signals so that the diode is then conducting.
 7. Acircuit for driving current through the control coil of a phase shifter,the circuit responsive to a train of paired pulses for providing amagnitude to the current in accordance with the ratio of the timespacing between pulses in each pair of pulses to the time spacingbetween successive pairs of pulses in the train of paired pulses, thecircuit comprising: a. first source of electric power, a second sourceof electric power, and grounding means, the grounding means connecting acommon terminal of the first and the second sources of electric power;b. switching means, the control coil connecting between the first sourceof electric power and one terminal of the switching means, a secondterminal of the switching means connecting with the second source ofelectric power, and a third terminal of the switching means connectingwith the grounding means whereby the second and the third terminals are,alternately, connected via a conducting path through the switch to thecontrol coil; c. flip-flop means connecting with and driving theswitching means, the flip-flop means being responsive to the train ofpaired pulses such that in response to a first pulse in each pair ofpulses a conducting path is provided between the control coil and thegrounding means, and in response to the second pulse in each pair ofpulses A conducting path is provided between the control coil and thesecond source of electric power.
 8. A driver in combination with aferrite phase shifter comprising: a first voltage source; an inductanceforming an input portion of the ferrite phase shifter; means responsiveto an applied pulse train for forming a first conducting path includingthe inductance and the first voltage source for the duration of eachpulse; a second voltage source; and means for forming a second currentpath including the inductance and the second voltage source during theinterpulse interval whereby a current integrating characteristic becomessynthesized.
 9. A current driver in combination with a ferrite phaseshifter comprising: a first voltage source; a coil forming an inputportion of the ferrite phase shifter; means, including a transistorcoupling the coil, and responsive to an applied pulse train for forminga first conducting path including the coil and the first voltage sourcefor the duration of each pulse, said transistor being driven intosaturation; a second voltage source; and means including the transistorfor forming a second current path including the coil and the secondvoltage source during the interpulse interval, the transistor being inan open circuit condition as allowed by the second current path, wherebythe level of integrated current in the coil is proportional to the dutycycle modulation of the appended pulse train.